What Nvidia actually built
Nvidia published architectural detail on Vera over the weekend, and the headline change is organisational as much as technical. Grace, its predecessor, used stock Arm Neoverse cores. Vera runs on Olympus, a core Nvidia designed itself against the Armv9.2 architecture. The specifications are aggressive: 88 cores and 176 threads on a single monolithic die built at TSMC on a 3nm process, 64 KB of L1 instruction cache and 96 KB of L1 data cache per core, 2 MB of L2 per core, and a 164 MB sharded system level cache. Memory tops out at 1.5 TB of LPDDR5X across eight controllers using SOCAMM2 modules.
The interconnect story is equally deliberate. Each socket delivers 1.2 TB per second of memory bandwidth, reaching 2.4 TB per second in a dual socket configuration, with roughly 14 GB per second available per core. NVLink chip to chip runs at 1.8 TB per second bidirectional, and the Scalable Coherency Fabric provides up to 3.4 TB per second of bisectional bandwidth. I/O includes PCIe 6.4 at 128 GB per second per x16 slot and CXL 3.1. Inside the core, Nvidia went wide: a 10 wide decoder, eight integer ALUs, six SVE2 128 bit vector pipelines, and a custom neural branch predictor that explores two branches simultaneously.
The argument that agents run on CPUs
Strip away the silicon detail and Vera is a bet on a specific claim about where enterprise AI workloads actually spend time. Nvidia states it plainly: "Agentic AI shifts more of the critical execution path onto the CPU." The reasoning is that an agent spends a small fraction of its wall clock time in model inference and the majority of it doing everything else, namely executing code, invoking tools, retrieving context, querying databases, parsing results, and deciding what to do next. None of that runs on a GPU. Nvidia's framing is that "CPU performance increasingly shapes both per-agent responsiveness and overall factory throughput."
Anyone who has profiled a production agent loop will recognise this as broadly accurate. The pattern in most enterprise deployments is a sequence of short model calls separated by longer stretches of tool execution, API waits, and data access, with the whole thing serialised because each step depends on the last. That workload profile is branch heavy, latency sensitive, and stubbornly single threaded, which is close to the opposite of what datacenter CPU design has optimised for over the past decade. The industry spent years chasing core count and aggregate throughput. Agent orchestration wants sustained per thread progress, and it wants the memory subsystem to keep a single thread fed.
A monolithic die in a chiplet world
The decision to put all 88 cores on one die deserves attention because it runs against where AMD and Intel have taken server silicon. Chiplets improve yield economics and let a vendor scale core counts by adding tiles. The cost is non uniform memory behaviour, cross die latency, and topology that leaks into application performance in ways that are difficult to reason about. Nvidia's argument for monolithic is predictability: a unified system level cache and a coherent fabric reduce topology driven variability and eliminate the overhead of crossing between dies.
For platform engineering teams, that predictability has real operational value. A significant amount of performance tuning effort on modern x86 servers goes into NUMA awareness, pinning, and working around the fact that two cores on the same socket may have materially different access costs to the same memory. Removing that variability makes capacity planning more honest and makes performance regressions easier to attribute. The trade is that Nvidia has bounded itself at 88 cores for this generation, and cannot scale core count the way a chiplet vendor can. For agent hosting, where per thread latency matters more than aggregate core count, that looks like the right trade.
How to read the benchmark claims
Nvidia claims up to 1.8 times higher performance on agentic workloads compared with x86 alternatives, benchmarked against AMD's 128 core Epyc 9755, and 2.6 times in graph traversal. Both figures come from Nvidia rather than an independent party, and no official SPEC CPU 2026 results accompanied the disclosure. We would treat the graph traversal number as the more credible of the two, since it measures a well defined pointer chasing workload where memory latency and branch prediction dominate and where Vera's design choices should genuinely help.
The agentic performance claim is harder to evaluate because the workload is not standardised. What counts as an agentic benchmark depends entirely on the ratio of tool execution to model inference to network wait, and a vendor selecting that ratio can move the result substantially. The practical guidance is unchanged from any other silicon transition: benchmark your own agent loop before committing. Instrument where the time actually goes in your highest volume agent, separate CPU bound work from network wait, and establish what fraction of latency a faster host could realistically remove. Many teams will find their agents are waiting on third party APIs, in which case no CPU helps.
What this changes in infrastructure planning
The useful takeaway does not require buying anything from Nvidia. It is that the host tier for agent workloads has been under specified in most enterprise deployments, because teams sized their infrastructure around GPU access and treated the CPU as the cheap part. If agent throughput is genuinely gated on single thread performance and memory latency, then the commodity host running alongside your inference capacity may be the constraint you have not measured. That is a testable proposition, and testing it costs a profiling session rather than a procurement cycle.
The announced deployment list also tells you something about who is buying. Meta, Oracle, Alibaba, ByteDance, CoreWeave, Lambda, Nebius, and NScale represent hyperscalers and neoclouds rather than enterprises, which means Vera will reach most organisations as an instance type rather than as hardware in their own racks. Practically, this becomes a question about whether your agent runtime is portable to Arm. Teams still shipping x86 only container images, or carrying native dependencies without Arm builds, will find the option closed to them when the instances appear. Getting your agent stack building cleanly on Arm is cheap insurance and worth doing before the choice matters.
The competitive question underneath
Vera continues Nvidia's move from selling accelerators to selling the whole machine. A customer buying a Vera Rubin system takes the GPU, the CPU, the interconnect, the memory topology, and increasingly the software that schedules across them. Each layer that becomes Nvidia's is a layer where a competitor cannot substitute, and the head node was one of the last places an x86 vendor still had a guaranteed seat in an AI rack. Designing a custom core rather than licensing one signals that Nvidia intends to hold that position rather than rent it.
For technology leaders the implication is about concentration risk rather than product choice. The set of vendors capable of supplying a complete AI training and inference stack is small and getting smaller, and pricing power follows. We would not let that observation drive an architecture decision on its own, because the performance argument for integrated systems is real and buying a worse system on principle helps nobody. We would let it drive contract structure: shorter terms where possible, explicit exit paths, and a genuine effort to keep the orchestration and data layers portable even when the compute underneath is not.
